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Memories in Cross-Point Arrays, April 2013
(memory elements, selectors, devices, applications) 

Memories stacked in cross-point arrays over CMOS logic periphery are envisioned as a class of memory with DRAM-like speed features and the density and cost effectiveness of NAND. They are projected to provide a future generation technology for NAND flash and for memory neuromorphic systems. These 3D stacked memory arrays would offer 4F2 cell size and microamp range current making them suitable for future very high density computing systems and even biological systems. They are expected to be CMOS compatible with 100% array efficiency since the cross-point array can be stacked over the periphery of the chip. A 32-Gb ReRAM Cross-Point Array test chip was shown at the recent ISSCC. Issues being addressed include: the type of memory element to use and the type of selector device in the array to maintain low cost while providing low leakage (sneak) current. Memory elements being considered include the various technology resistance RAMS such as Metal-Oxide ReRAM, Phase Change Memory, STT-MTJ MRAM and others. Memory arrays without selector devices, using the non-linear current-voltage properties of the memory element, have been considered. Selector devices considered include various types of vertical diodes including: poly-Si junction diodes, oxide diodes, VO2 diodes, MIM diodes, MIEC devices, Ovonic Threshold Switches, NPN, PN and Schottky barriers. Self-Rectifying Memory Elements offering Complementary Resistive Switching are being studied extensively for use in selector-less cross-point arrays. A variety of these self-rectifying memory elements are in development in several technologies.

100+ pages.

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Memories in Cross-Point Arrays, April 2013  

Table of Contents

Executive Overview

1 Overview and Applications of Cross-Point Switch Memory

• 1.1 Overview of Cross-Point Switch Memory
• 1.2 Potential Applications for Cross-Point Memory Arrays
  • 1.2.1 Cross-Point as Future of NAND Flash
  • 1.2.2 Cross-Point in Neuromorphic Systems
    • 1.2.2.1Pattern Recognition:
    • 1.2.2.2Visual System:

2 Cross-Point Array Memory Chips

• 2.1 32-Gb 24 nm ReRAM Cross-Point Array Chip and Circuits (Sandisk, Toshiba)

3.0 An Analytical Look at Cross-Point Memory Arrays

• 3.1 Size Limitation and Pattern Dependence of Cross-Point Memory array (Stanford)
• 3.2 Multispacer Patterning of Nanowire Cross-Point (CEA-LETI, U.Milano-Bicocca, EPFL)
• 3.3. Device and Circuit Analysis of RRAM Crossbar Array with Cell Selector (Peking U)

4.0 Cross-Point Array Memories without Cell Selectors

• 4.1 Background on Cross-Point Memory Arrays without Cell Selectors
• 4.2 High Density Four Layer Cross-Point Memory Array (Stanford U.)
• 4.3 Techniques for Cross-Point Resistive Array Without Select Device (Unity Semi)
• 4.4 2Mb TiOx/Ta2O5 MO RRAM Selector-less Crossbar (Hynix, Hewlett-Packard)
• 4.5 High Density Cross-Point STT-MRAM Architecture (U. of Paris Sud)
• 4.6 Sub uA Operating Current in Multilevel Vertical ReRAM Array (Samsung)
• 4.7 Vertical HfOx ReRAM 3D Cross-Point Array without Cell Selector (Stanford, PekingU)

5.0 Characteristics of Memory Elements Used in Cross-Point Arrays

• 5.1 Characteristics of ReRAMs in Cross-Point Arrays
  • 5.1.1 8 Mb Multilayered Bi-Polar Cross-Point 180 nm ReRAM Macro (Panasonic)
  • 5.1.2 Scaling for Cross-Point Resistive Memory at the sub-10nm Node (Stanford)
  • 5.1.3 AlOx-Based ReRAM with CNT Electrode in Cross-Point Array (Stanford HKU.of S&T)
  • 5.1.4 Model Framework for Analyzing Cross-Point ReRAMs (New York Univ.)
  • 5.1.5 Film Thickness and Scaling Effects in Scaled ReDox ReRAM (Gwangju Inst.)
  • 5.1.6 Fully Functional sub 100 nm2 Area Hf/HfOx ReRAM (IMEC)
  • 5.1.7 Programmable TSV 3-D Fabric ReRAM (System Ecole Polytech)
  • 5.1.8 RRAM with Thermal Sensors for Logic/RRAM Crossbar Arrays (Rochester IT)
• 5.2 Characteristics of Unipolar RRAM in Cross-Point Arrays
  • 5.2.1 RESET-SET Instability in ReRAM Cross-Bar Array (Politechnico di Milano)
  • 5.2.2 High Yield Ni/HfOx/n+ Si RRAM Cross-Bar+ Si Diode (Nanyang TU, NUS, Soitec, Fudan)
  • 5.2.3 Ni/HfOx/n+ Si Unipolar RRAM Cross-Bar+ Si Diode (Nanyang TU, NUS, Soitec, Fudan)
  • 5.2.4 Ni/Ox Anode for Unipolar HfOx RRAM For 3D Stacking (ITRI, NTHU, Ming ShinU)
  • 5.2.5 Unipolar NiO RRAM Ireset & SET-RESET Instability (Polit.diMilano, IMM-CNR)
  • 5.2.6 Unipolar RRAM on Si Diode (Nanyang TU, PekingU, A*STAR, NUS, GlobalFoundries)
  • 5.2.7 Cross-bar NW Unipolar Ni/NiO RRAM (Politec.di Milano, Lawrence Berkeley Lab)
• 5.3 Characteristics of Phase Change Resistance Memories in A Cross-Point Array
  • 5.3.1 Overview of PCM Memory Elements in Cross-Point Array
  • 5.3.2 Stacking PCM in Cross-Point Array with Ovonic Threshold Switch (Intel, Numonyx)
  • 5.3.3 Scaled PCM For Cross-Point Array Using CNT at 2.5 nm Node (Stanford U.)
  • 5.3.4 Stackable 4F2 Serially Connected Lateral PCM with Poly MOS Transistor (Hitachi)
  • 5.3.5 Dual Trench Epitaxial Diode Array for High Density PCM (SMIC, CAS, Microchip)
  • 5.3.6 20 nm 4F2 PRAM Cell with Diode for Cross-Bar Array Architecture (Samsung)
  • 5.3.7 1Gb 4F2 Memory Chip with PC-RAM and Polysilicon Access Device (Hynix)
• 5.4 Characteristics of Spin Torque Transfer MTJ Memory Switches in Cross-Point Array
  • 5.4.1 Overview of STT MTJ Switches in Cross-Point Arrays
  • 5.4.2 Cross-Point Architecture Using STT-MTJ (IEF, U.Paris-Sud, UMR, CNRS, STMicro.)
  • 5.4.3 STT-MTJ Cross-Point with No Sneak Current (U.Paris-Sud, STMicro, Imp. Col. Lon.)
  • 5.4.4 Configurable MRAM Logic Block Cross-Bar Technology (IEF,U.Paris-Sud,UMR, CNRS)
• 5.5 Characteristics of Other Memory Elements in Cross-Bar Arrays
  • 5.5.1 Organic Memory Cross-Bar Array with Graphene Electrode (Gwangju Inst.of S&T)

6.0 Selectors for Cross-Point Arrays

• 6.1 Overview of Selectors for Cross-Point Arrays
• 6.2 Polysilicon Junction Selection Diodes
  • 6.2.1Cross-Point PCM Using Polysilicon Selection Diode (Hitachi)
• 6.3 Oxide Diodes in ReRAM Arrays
  • 6.3.1 CuOx -InZnOx Heterojunction Thin Film Diode With NiO ReRAM (Samsung)
  • 6.3.2 Multi-Level OTP Oxide Diode in Cross-Point Array (Samsung, Hanyang U.)
  • 6.3.3 Heterostructure Diodes for Sneak Current in ZnO RRAM Crossbar Array (KAIST)
  • 6.3.4 VO2 Select Device for Bipolar ReRAM Cross-Point Array (Gwangju IST)
  • 6.3.5 TiO2 MIM Selection Device for TiO2 RRAM Cross-Point Array (Gwangju IST)
  • 6.3.6 TiN/TaOx/Pt Selector for Pt/TaOx/Pt ReRAM Crossbar Array (IME Peking U.)
• 6.4 MIEC Selection Devices
  • 6.4.1 MIEC Access Devices for 3D Stacked Crosspoint Arrays (IBM)
  • 6.4.2 512Kbit Arrays with PCM Memory and MIEC Access Devices (IBM)
• 6.5 Ovonic Threshold Switches
  • 6.5.1 PCM in Cross-Point Array with An Ovonic Threshold Switch (Intel, Numonyx)
  • 6.5.2 Threshold Switching AsTeGeSiN Select Device (Samsung)
• 6.6 Vertical NPN Selection Devices
  • 6.6.1 4F2 CMOS Cross-Bar HfO2 ReRAM with Vertical BJT Access (NTHU, ITRI)
  • 6.6.2 Crossbar ZrO2 RRAM built on a foundry platform substrate (Chin. Acad. Of Sci)
  • 6.6.3 Two Terminal Switch for Crossbar Array (Hanyang Univ., Korea Basic Sci. Inst.)
  • 6.6.4 Vertical Bipolar Switching Poly-Si npn Diode for Cross-Point Array (NTNU, ITRI)
  • 6.6.5 Silicon Epitaxy Punch-Through Diode for Bipolar ReRAM Selector (IIT Bombay)
• 6.7 PN Diode Selection Devices
  • 6.7.1 Various Drivers for Scaled PCM Arrays (H.K.U., IBM, Qimonda, Macronix)
  • 6.7.2 Two Terminal Diode Status for 3D X-Bar ReRAM Array (Applied Materials)
  • 6.7.3 Diode Steering Element in 3D PCM Cross-Bar Switch (Applied Materials)
• 6.8 Varister-type Bidirectional Switch for 3D Bipolar ReRAM Array (Gwangju, Hynix)
• 6.9 Threshold Vacuum Switch (NDL, NARL, NCTU, Mesoscope, FJU, CYCU, U of Calif. Berkeley)
• 6.10 Schottky Barriers for Cross-Point Array Selector Devices
  • 6.10.1 Cross-Point Resistive Memory with Self-Formed Schottky Barrier (Gwangju)
  • 6.10.2 8 Mb Cross-Point Bipolar Array with Bidirectional MSM Diode (Panasonic)
  • 6.10.3 Schottky Diode for Unipolar HfOx-RRAM (Nanyang TU, NUS, Soitec, SUSTChina)

7.0 Self-Rectifying ReRAMs in Cross-Point Arrays /Complementary Resistive Switching

• 7.1 Overview of Self-Rectifying/Complementary Switching ReRAMs
• 7.2 Self-Rectifying Resistive Cross-Bar Memory Using Gold NC (Chinese Acad. of Sci.)
• 7.3 Complementary ReRAM for Dense Crossbar Arrays (Inst. of SS,Julich,AachenU)
• 7.4 BiLayer RRAM Devices in A Diode-Free Cross-Point Array (Gwangju Inst.of S&T)
• 7.5 Cross-Point CNT ReRAM (Stanford, HKUST, U. of Calif.Berkeley, HongKong Poly)
• 7.6 3D Bipolar ReRAM Forming Memory Islands (NYU)
• 7.7 Peripheral Design for Cross Point Memristor-based RRAM (Penn. State Univ.)
• 7.8 CRS Memory using Amorphous Carbon and CNT (Stanford U, U.Calif., Hong Kong PolyU.)
• 7.9 CMOS Memristors for Neuromorphic Architectures (HRL Labs, U. of Michigan)
• 7.10 Self-Rectifying HfOx RRAM (NTU, IMEP, A*STAR, NUS,GF, CAS, Soitec, Fudan)
• 7.11 Complementary Switching in MO-RRAM for Crossbar Arrays (Politecnico di Milano)
• 7.12 Electromechanical Diode Cell for a Cross-Point NV Memory Array (U. of Calif.)
• 7.13 Modeling CRS for Leakage Reduction in Crossbar arrays (U. of Adelaide)
• 7.14 Self-Rectifying HfOx Unipolar RRAM ( Nanyang, PekingU, NUS, Soitec, FudanU,SUS&T)
• 7.15 Diode Effect of IGZO layer in TiO2-type ReRAM (Seoul Nat. U.)
• 7.16 Complementary Resistive Switches Using a Heterodevice (Gwangju IST)
• 7.17 Self-Selective W/VO2/Pt ReRAM for Dense Cross-Bar Applications (Gwangju IST)
• 7.18 Two-Step Write Technique for Complementary Memristor Array (Hynix, Kookmin U.)
• 7.19 Cross-Point Array 1R CB-RRAM Multi-Layer HfO2/SiO2/Cu-GST Cell (Macronix)
• 7.20 Self-Adaptable Sense Resistors for Sneak Current in a Cross-bar Array (U.of Calif).
• 7.21 Hybrid Nb2O5/NbO2 ReRAM with Combined Memory&Selector(Gwangju, Hynix)
• 7.22 Analysis of Complementary RRAM Switching (IMEC, ESAT-KUL)
• 7.23 Self-Rectifying ReRAM Requirements in Cross-Point Arrays (IMEC, KULeuven, ESAT)
• 7.24 Complementary Stacked Bipolar RRAM Cross-Point Arrays (NYU, NanyangTU, ICF)
• 7.25 Bipolar ReRAM with Self-Rectifying Behavior in the LRS (NUS, Soitec, SUST China)
• 7.26 Complementary Switching Oxide-based Bipolar ReRAM (Politec di Milano, U of Texas)
• 7.27 Complementary Resistive Switching in Ni2O5-based ReRAM (Gwangju, McGill, Postech)

Bibliography

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