MEMORY STRATEGIES INTERNATIONAL Semiconductor Memory Services
| Home | Reports | Seminars | Consulting | Contact Us | About Us | Site Map | Links |

Contents | Purchase

A Memory Strategies Focus Report

Trends in Low Power Ferroelectric Memories, January 2012
(1T1C FeRAM, Plastic FeRAM, FeFET, FeNAND, Chain/Ladder FeRAM, TFT FeRAM)

The 1T1C FeRAM devices are non-volatile and have very low operating and standby power with energy in the pJ range. They have fast read and write access and can be specified across the automotive and industrial extended temperature ranges. They are also radiation resistance. Their main drawback has been that they are currently available in low densities generally less than a few Megabits. Their endurance is high, up to 10¹⁵, but it is a read and write endurance since the device has a destructive read and must be rewritten on each access.

There is an 8-bit MCU from Fujitsu and a 16-bit MCU from TI that use the 1T1C FeRAM for embedded memory. Since the FeRAM has both fast bit-level write and non-volatility, it could replace the Flash, EEPROM, and SRAM embedded memory in the MCU. The 1T1C FeRAM is in production at three major facilities: Fujitsu in 180 nm, TI in 130 nm, and IBM in 180 nm technology. Ramtron, who sources from all three manufacturers has been in production with small FeRAMs for many years. Silterra and Symetrix have announced a cooperation for an FeRAM foundry process.

The 1T1C FeRAMS are used primarily in battery back-up solutions as well as in metering and factory automation. They can be specified for extended temperature ranges and have fast write access so they are also used in industrial for data logging. They are resistant to magnetic fields and radiation, which makes them useful for in the medical, aerospace and food industries. The FeRAM's low power operation makes it suitable for buffers in enterprise SSD applications as well as RFID and energy harvesting systems.. They are also used for their fast write operation in digital event data recorders. Their radiation hardened property makes them useful for military and space applications. Extended temperature operation also makes FeRAMs useful for automotive. Portable applications such as home healthcare meters are also possible.

Very low power ferroelectric memories can potentially be made at low cost on plastic substrates with large scale production equipment in applications such as energy harvesting arrays, sensors and actuators. Thinfilm Technology is in production for memory in toys with a plastic passive ferroelectric memory. Thinfilm and PARC are cooperating in development of CMOS logic on plastic to provide low cost addressable memories on plastic using roll-to-roll manufacturing for applications such as sensors.

Development of the single transistor FeFET has accelerated with efforts to improve the retention by, for example, adding oxide interface layers. As a result, there have been several efforts to string the FeFETs together like NAND flash circuits in scaled geometries. Toshiba is in development with a Chain FeRAM and a Ladder FeRAM using 1T1C technology intended for some of the same markets as the NAND flash.

115+ pages.

Overview | Purchase

Trends in Low Power Ferroelectric Memory, Jan. 2012

Table of Contents

0.0 Overview

1.0 FeRAM Applications and Markets

• 1.1 Overview of FeRAM Applications
• 1.2 RFID FeRAM Applications
  • 1.2.1 RFID Market
  • 1.2.2 1T1C FeRAM in RFID Chips
  • 1.2.3 Polymer FRAM in RFID Applications
  • 1.2.4 Transit Fare Cards
  • 1.2.5 Electronic Barcodes and Smart Labels
• 1.3 Industrial Systems
  • 1.3.1 Industrial Battery Operated Smart Systems
  • 1.3.2 Industrial Control Systems
  • 1.3.3 Data Collection with Tamperproof Time-Stamp
  • 1.3.4 Utility Metering Applications
  • 1.3.5 Automatic Meter Reading System using an FeRAM (Univ. of Hebrei)
  • 1.3.5 256Kb FeRAM in the Design of a 24-bit Portable Geophone(Beijing U. of CE&Arc)
• 1.4 SSD and Computing Applications
  • 1.4.1 FeNAND Flash SSD with 9.5 GB/s write and 1.0 V Power Supply (U. of Tokyo)
  • 1.4.2 FeNAND with NV Page Buffer in Enterprise SSD Applications (U. of Tokyo, NIAIST)
  • 1.4.3 Multifunction Printers
• 1.5 Military and Space Applications
  • 1.5.1 FeRAM for Error Detection in a Low Earth Orbit Satellite (SUPARCO)
  • 1.5.2 FeRAM Devices for Long Satellite/Space Missions
• 1.6 Automotive Systems
  • 1.6.1 FeRAM for Automotive Extended Temperature Applications
• 1.7 Medical Battery Operated Systems
  • 1.7.1 Home Healthcare Meters
• 1.8 Energy Harvesting Systems

2.0 Conventional 1T1R/2T2R FeRAM

• 2.1 Conventional 1T1R/2T2R FeRAM Characteristics and Development
  • 2.1.1 Low Voltage 130 nm 1 Mb eFRAM with a New Sensing Scheme (Texas Instruments)
  • 2.1.2 Low Voltage 1Mb 130 nm 1T1C FeRAM Chip with New Sensing Scheme (MIT, TI)
  • 2.1.3 Characteristics of MCU with Embedded FRAM (TI)
  • 2.1.4 Foundry Offering Standard FRAM with 180 nm LP Process(Silterra, Symetrix)
  • 2.1.5 64-Kb 180 nm FeRAM with Serial I2C Interface (Ramtron, IBM)
  • 2.1.6 180 nm EEPROM Compatible FRAMs (Fujitsu)
  • 2.1.7 16-bit MCU in 130 nm Technology with Embedded FRAM (Texas Instruments)
  • 2.1.8 8-Bit MCU with Embedded FRAM for Low Power Applications (Fujitsu)
  • 2.1.9 NV Memory Effects in Epi PZT/LSCO (Konkuk University)
  • 2.1.10 A Fatigue Insensitive Self-Reference for 1T1C FRAM (Tsinghua University)
  • 2.1.11 Sub 10 um Wafer Thinning for 3D Terabit FeRAM(U Tokyo, Fujitsu, DISCO)
• 2.2 Test, Reliability, Simulation and Modeling of 1T1C F-RAM
  • 2.2.1 Reliability of 2T-2C FeRAM embedded in 130 nm CMOS Logic (TI, Ramtron).
  • 2.2.2 Reliability and Modeling of MOCVD PZT Ferroelectric Capacitors (U. of Florida, TI)
  • 2.2.3 Spice Model Development for FRAM Memory (Inst. of Eng. & Bio-Tech, Nohali, India)
  • 2.2.4 Local Surface Potential in Polycrystalline Ferroelectric Films (KAIST)

3.0 Chain and Ladder FeRAM

• 3.1 Ladder FeRAM (Toshiba)
  • 3.1.1 100 MHz Ladder FeRAM with CCB Cell (Toshiba)
  • 3.1.2 Ladder FeRAM Cell for 10 ns Read/Write Cycle CMOS Compatible FeRAM(Toshiba)
• 3.2 Chain FeRAM
  • 3.2.1 Basics of Chain FeRAM
  • 3.2.2 Scalable Shield BL Overdrive Technique for Sub 1.5 V Chain FeRAM (Toshiba)
  • 3.2.3 128 Mb Chain FeRAM Design for Enhanced HDD Performance (Toshiba)
  • 3.2.4 64-Mb Chain FeRAM with 200 MB/s Burst Mode (Toshiba)
  • 3.2.5 Chain FeRAM with Scalable Shield Bit-line Overdrive (Toshiba)
  • 3.2.6 128-Mb 130 nm Chain FeRAM with SDRAM DDR2 Interface (Toshiba)

4.0 Single Transistor Ferroelectric Memories MFIS FET

• 4.1 Modeling MFIS-FETS for Design and Performance Improvement (Xiangtan Univ.)
• 4.2 Effect of Gate Thickness on Memory Behavior of BST MFIS-FeFET(U. of Malaysia)
• 4.3 FeFET Made Using Silicon Nanowires with Ferroelectric Polymer (Purdue University)
• 4.4 Model of Metal-Ferroelectric-ZnO FET Showing Improved Characteristics (XiangtanU.)
• 4.5 BiStable Memory Operation in Single Layer Graphene FeFET (U. of Calif, LA)
• 4.6 Hybrid Ferroelectric and Charge NV Memory (Cornell University)
• 4.7 Study of Retention Mechanism for FeFETs (Yale Univ.)
• 4.8 MFIS FET with HfTaO Buffer (Fujitsu, Tokyo IT., Xiangtan U., Hong Kong U. S&T)
• 4.9 Ferroelectric Gate Thin Film Transistor (JAIST, ERATO)
• 4.10 MFIS Capacitors with BFO Ferroelectric Film and TiO2 (Tsinghua University)
• 4.11 MFIS Diodes with BNT and Y2O3 Insulator (Xiangtan University)
• 4.12 Flexoelectric Effect on Electrical Behavior of MFIS Capacitor (Xiangtan Univ.)
• 4.13 eDRAM Using MOS Transistor with Ferroelectric Gate (Yale U. , Semi Reas. Corp.)
• 4.14 Characteristics of MFIS Diodes (Tokyo Institute of Technology)

5.0 Ferroelectric NAND NV Memory

• 5.1 A Dual Channel TFT - FeFET Used in NAND Type Memory (Panasonic)
• 5.2 Scaled FeFET for Use as FeNAND Flash Memory Cells (NIAIST)
• 5.3 FeNAND with 0.5 V Bit-Line Self-Boost Programming Voltage(AIST, U. of Tokyo)
• 5.4 NV NAND FeRAM Page Buffer for an SSD (Univ. of Tokyo and NIAIST)
• 5.5 Ferroelectric Memristor for NAND Analog Memory Characteristics (Panasonic)
• 5.6 FeNAND Flash SSD with 9.5 GB/s write and 1.0 V Power Supply (U. of Tokyo)
• 5.7 Fe-NAND with NV Page Buffer Using a MFIS Transistor (U. of Tokyo, NIAIST)

6.0 Various System Circuits Using Ferroelectric Memory

• 6.1 Low Current MCU with eFeRAM for Energy Harvesting (TI)
• 6.2 Low Leakage Duel Ferroelectric Capacitor Architecture for TAG RAM (Purdue U.)
• 6.3 FeFET as the Transistors in a 6T SRAM (U. of Tokyo, NIAIST)
• 6.4 Non-Volatile Logic Using Ferroelectric Devices (Rohm)

7.0 Plastic Organic Ferroelectric Memory Circuits

• 7.1 Plastic Printed Addressable Memory (Thin Film Electronics and PARC)
• 7.2 Production Facility for Polymer Memory using Roll-to-Roll Printing (Thinfilm, Inktec)
• 7.3 Read Function of Ferroelectric Polymer Cell (ThinFilm)
• 7.4 40-bit Roll-to-Roll Plastic Ferroelectric NV Memory (Thin Film Electronics)
• 7.5 Organics Ferroelectric FET Enhancement (Seoul Nat. Univ.)
• 7.6 Organic Bistable Rectifying Diodes for Crossbar Memory Array (U. of Groningen)
• 7.7 Making PZT Thin Film Capacitors on Flexible Plastic Substrates (Samsung, SKKU)
• 7.8 Coercive Voltages in Polymer Ferroelectric Capacitors (KAIST)
• 7.9 Characteristics of An Organic FeFET Memory Made by Inkjet Printing (PARC/Xerox)
• 7.10 Fe-Polymer Gate on Conventional MOS FET (Swiss Fed. Inst. of Technology)
• 7.11 Printed Ferroelectric Memory and Transistor Circuitry (Thinfilm and Xerox PARC)
• 7.12 Functional Large Area Organic Memory with 3T Ferroelectric Cell (U. of Tokyo)
• 7.13 Printed Plastic Ferroelectric Memory (ThinFilm and InkTec)

8.0 Development and Characteristics of Copolymer Memories

• 8.1 Potential Mass Production Method of 3D Ferroelectric P(VDF-TrFE) Memory(Fudan U.)
• 8.2 Novel Low Voltage NV Polymer FeFET with Controlled Nanostructures(Yonsei U.)
• 8.3 Interface Effects of Electrons at the Insulator/Semiconductor Interface (U. of Potsdam)
• 8.4 Flexible Fe-TFT using [P(VDF-TrFE)], a-IGZO, PEN Substrate (Tokyo Ins. of Tech.)
• 8.5 Hybrid Dual-Date Org/Inorg NV Memory TFT(Kyung Hee U, Elec.& Telecom Res.Inst.)
• 8.6 Organic Copolymer Resistive Switches Using P(VDF-TrFE) (U. of Groningen, Philips Labs)
• 8.7 Subthreshold Swing of Stack using P(VDF-TrFE)(Fed. PolyTech,U.Auto Barcelona)
• 8.8 Polarization Behavior of Poly (VFT) CoPolymer Ferroelectric Capacitors (U. of Texas )
• 8.9 Property Improvement of [P(VDF-TrFE)] on Exposure to Plasma Ambient (Yonsei U.)
• 8.10 Effect of Curie Temp on Performance of Organic FeFETs (Fed. Polytech Lausanne)
• 8.11 Control of Thin Polymer Ferroelectric Films for Memories (Yonsei University)
• 8.12 MFIS Transistors based on Langmuir-Blodgett Copolymer Films (U. of Nebraska)
• 8.13 Effect of Al2O3 Interface Layer on Retention in [P(VDF-TrFE)] Thin Film (ETRI)
• 8.14 FeFET Using Ferroelectric Polyvinylidene Fluoride Film Dielectric (IFF Res. Ctr. Julich)
• 8.15 Ferroelectric Properties of Polymer [P(VDF-TrFE)] Thin Films (Cornell U.)
• 8.16 Effect of Poling Voltage on Polarization Fatigue in Copolymer Film (Fudan U.)
• 8.17 Ferroelectric Properties of Films of Vinylidene Flouride Oligomer (East China U. S&T)
• 8.18 Low Temperature [P(VDF-TrFE] Cells on Glass Substrate
  • 8.18.1 A 2T 1 IGZO TFT Array for use on a Glass Substrate for Mobile Display Panel
  • 8.18.2 Low Temperature1T 1R(TFT) Ferroelectric Memory Cell on Glass Substrate (ETRI)
  • 8.18.3 Characteristics of Ferroelectric NVM-TFT using [P(VDF-TrFE)] (Yonsei University)

9.0 Ferroelectric Materials Development

• 9.1 Ferroelectric Yttrium Doped Hafnium Oxide (Fraunhofer CNT)
• 9.2 Ferroelectricity in Crystalline hafnium Silicon Oxide (Fraunhofer CNT, Namlab)
• 9.3 Nd-Doped Bismuth Titanate FeFET (Tsingjua U., McGill U, Aalto U. U of EST China)
• 9.4 Ferroelectric Polarization in PVDF-CTFE thin films (Yonsei University)
• 9.5 Materials Partnership for Polymer Printable Memory and CMOS Logic(Thinfilm,Polyera)
• 9.6 New Phase Transitions in TiGaSe2 in the 140-180 K Range (Gebze Inst. of Tech.)
• 9.7 Oxide Materials with Both Ferroelectricity and Ferromagnetism (Univ. of Leeds)
• 9.8 Ferroelectric Deposition NanoLithograpy on Polymer Using AFM (Georgia Inst.of Tech)
• 9.9 Ti Substitution for Fe in BiFeO3 and Effect on Properties of FeRAM (U. of Tech, Taishan)
• 9.10 Self-Organized PbTiO3 Ferroelectric Nanocrystals on Atomically Flat Pt
• 9.11 Potential Hydrogen Barrier Layers for Various FeRAM Capacitors (Osaka Pref. Univ.)
• 9.12 Characteristics of PZT-TiO2-Si Structures Deposited by MOCVD(Tsinghua Univ.)
• 9.13 Properties of Lanthanum doped SBT (Vardhaman Col. of Eng., JNTUH Col. of Eng.
• 9.14 Room Temperature Fabrication of Multiferroics for RAM Elements (U. of Puerto Rico)
• 9.15 Solution Processed Ferroelectric Film Transistor (Japan Science&Technology Agency)
• 9.16 Electrical Fatigue in CoPolymer Ferroelectrics (Fudan U.)
• 9.17 Study of Epi Fabricated Ferroelectric LiNbO3 Memory(U. Elec. Sci.&Tech.China)

10.0 Ferroelectric Memory Research

• 10.1 Study of Ferroelectric Domain Wall Motion Related to Reliability (Max Planck Inst.)
• 10.2 Electrical Tuning of Metastable Dielectric Constant of FE Single Crystals(U. of Calif., LA)
• 10.3 Photovoltaic Current Read-Out in Poled Capacitors Using PZT(Russian Acad. of Sci.)
• 10.4 Nanosecond Range Imprint and Retention in Leaky FE Thin Films (Fudan U.)
• 10.5 Model for Non-Equilibrium Switching Processes in Ferroelectrics (Nat. Phys. Lab,UK)
• 10.6 Ferroelectric Properties of Bi3.15Nd0.85Ti3O12 nanotubes (Nanjing Univ.)
• 10.7 Ferroelectric Vortex Domain Pattern Modification in Hexagonal Manganite(U.of Bonn)
• 10.8 Domain Wall Velocity&Roughness in disordered PLZT Ceramics (Russian Acad. of Sci.)
• 10.9 Ferroelectric Characteristics of HfZrO films in TiN MIM Capacitor (FraunhoferCNT)
• 10.10 Photocrosslinking of Ferroelectric Polymers and Use in 3-D Memory Arrays(HTC, Eind)
• 10.11 Two Terminal Ferroelectric Memories In Inorganic Materials (Nanjing Univ.)
• 10.12 A Ferroelectric Tunnel FET (Federal PolyTech of Lausanne)
• 10.13 Memory Effect in Ferroelectric Quantum Dots (National Physics Lab, New Delhi)
• 10.14 Negative Capacitance Ferroelectric FET Model (U.AutonomadeBarcelona, U.de Granada)
• 10.15 Nanoscale Thin Film Ferroelectric Capacitors with Terabyte Density(Max Planck Inst.)
• 10.16 Temperature Behavior of PZT-ZnO MFS Memory (Nat. Inst. of Mat. Phys.)
• 10.17 Properties of Multi-Ferroics (U. of Applied Scienc, Kiel)
• 10.18 Graphene FET Using Ferroelectric Gating ( Nat. Univ. of Singapore)
• 10.19 Shape Dependence of Ferroelectric Switching in Epi BFO (Argonne Nat. Lab)
• 10.20 Piezoacousto/Pyroelectric Properties of Ferroelectric Material(Academgorodoc Novosibirsk)
• 10.21 Strained Strontium Titanate on Silicon as a Ferroelectric Gate Oxide.

11.0. Suppliers, Developers and Fabrication Facilities for Ferroelectric Memories

• 11.1 Celis Semiconductor
• 11.2. Fujitsu
• 11.3 IBM
• 11.4 Panasonic
• 11.5 Philips
• 11.6 Ramtron:
• 11.7 Rohm Ferroelectric Memory
• 11.8 Samsung
• 11.9 Symetrix and Silterra FRAM Foundry
• 11.10 Texas Instruments
• 11.11 Thin Film Electronics
• 11.12 Toshiba
• 11.13 Xerox (PARC)

Bibliography:

Overview | Contents

To order "Trends in Low Power Ferroelectric Memories, Jan. 2012
 

Contact Memory Strategies or
Complete the form below and send (by e-mail, fax, or post) the form and your check, bank transfer, or purchase order for $975. ($850 if you have ordered a report from Memory Strategies in the past year.).

ORDER FORM: Please send ______ copies of  "Trends in Low Power Ferroelectric Memories, Jan. 2012" to:

Report Format

____ PDF. Will be sent by email. Please send your order by email, if possible. Printing hardcopy from PDF is permitted.

____ (Hardcopy of report only available for shipping within USA. We apologize for any inconvenience.
           Report will be sent by 2-Day FedEx. Please send all information requested above.)
         If you wish both PDF and Hardcopy, please add an additional USD200 to your order

Submit Order and Payment Information via:
    Email: info@memorystrategies.com, or
    Fax:    +1 512 900 2846
    Post:
        Memory Strategies International,
        16900 Stockton Drive,
        Leander, Texas 78641, U.S.A.

To pay by:

• Credit Card: please fax credit card information to +1 512 900 2846
• Bank Transfer: please send in your order and request transfer details.
• Purchase Order: submit purchase order details with order.

For more information, please Contact Memory Strategies

| Home | Reports | Seminars | Consulting | Contact Us | About Us | Site Map |

Memory Strategies International, 16900 Stockton Drive, Leander, TX, USA, 78641;   512.260.8226 (phone), 512.900.2846 (fax). Send questions or comments about this website to webmaster@memorystrategies.com. Copyright © 2010 Memory Strategies International. All rights reserved. Legal stuff. Last Modified: February, 2011.