CONTENTS
| TO ORDER
Nanocrystal Flash
Memory Technology
(Nanodot, Quantum Dot, NAND, NOR, Hi-K, Self-Assembly, Vertical, Metal, Metal
Silicide, Characterization, Reliability & Test)
February 2010
Development efforts continue in nanocrystal non-volatile
memories. Both NOR and NAND flash memories have been described using
nanocrystals. Particular effort has been focused recently on: self assembly of
nanocrystals, development of metal and metal silicide nanocrystal memories,
development of high-k blocking materials for the IPD in these memories, cells
with multiple layers of nanocrystals, tunnel engineering and development of
vertical nanocrystal structures. Efforts continue on modeling the nanocrystal
memories and on reliability studies. 70+ pages
DESCRIPTION | TO ORDER
Nanocrystal Flash
Memory Technology
(Nanodot, Quantum Dot, NAND, NOR, Hi-K, Self-Assembly, Vertical, Metal, Metal
Silicide)
February 2010
Table of Contents
Executive Summary
1. Overview of Current Trends in Nanocrystal Memory
2.0 NanoCrystal Cells NOR Flash Memory Arrays
- 2.1 Cylindrical Bit Cell for 90 nm 4-Mb Si-NC NOR Flash Memory (Numonyx)
- 2.2 Split Gate Cell in 128-KB NOR Flash Memory Array (Freescale)
- 2.3 32-Mb Nanocrystal Memory for Embedded NOR Flash
- 2.4 16-Mb NOR Flash Fabrication and Integration (ST Microelectronics)
3.0 Nanocrystal Memories in NAND Flash
- 3.1 Memory for NAND Flash with Single Layer Platinum NC (Indian Inst. of
Tech.)
- 3.2 Pt Single and Double Layer NC Memories for <30nm NAND Flash (IIT,
Mumbai)
- 3.3 Transient Behavior of NAND Nanodot Flash Cell (Micron, Yale U.)
- 3.4 Using Various High-K IPD on a Silicon NC NAND Flash Memory (CEA-LETI)
- 3.5 Tri-Gate FinFlash SN Memory for NAND Flash (CEA/LETI)
4 Dielectric Studies for Nanocrystal Memory
- 4.1 High-K Blocking Oxide for Nanocrystal Memory
- 4.1.1 Overview of use of High-K Blocking Oxide for Nanocrystal Memory
- 4.1.2 Memory Characteristics of HfO NC in Al2O3 film memory stacks (Chang
Gung Univ.)
- 4.1.3 IrOx Metal Nancrystal Memories in High-K Al2O3 films
- 4.1.4 SOHOS using High-k Y2O3 nanocrystal film (Chang Gung U)
- 4.1.5 High-k Al2O3 as Blocking Oxide for 3-D Self-Assembled NC Memory (U.
of Texas)
- 4.1.6 Study of Integrated Arrays of Silicon NC Memories Using HfAlOx IPD (CEA-LETI)
- 4.1.7 Using Various High-K IPD on a Silicon NC Memory (CEA-LETI)
- 4.1.8 Multi-Gate FET with Al2O3 Blocking Dielectric and TiN NC (Nat. Chiao
Tung U.)
5.0 Nanocrystal Self Assembly
- 5.1 Mapping Method for Nanocrystal Self Assembly (U. of Michigan)
- 5.2 CdSe NC by Self-Assembled Di-Block Copolymer(MyongjuU, Seoul NU,
YonseiU)
- 5.3 Nanoscale Ordering of Ge Nanocrystals (Queensland Univ. of Tech.,
Brisbane)
- 5.4 Self-Assembly of Nickel NC Memories Using Block CoPolymer (U. of
Texas)
- 5.5 Chaperonin Protein Lattice for NC Self Assembly (U. of Texas, U. of
Oklahoma)
- 5.6 Si-NC Self Assembly using Dissociation of SiH2C12 Gas (Feng Chia U.)
- 5.7 Forming Regular Spherical Patterns Using Block Copolymers in a Wafer
Fab (MIT)
6.0 Alternative Nanocrystal Materials
- 6.1 Memory Devices with Germanium Nanocrystals
- 6.1.1 Lanthanide Graded CT Stack with Ge Nanocrystals (Nanyang Tech.
Univ.)
- 6.1.2 Charge Storage Characteristics of NiSiGe NC Memories (Nat.Chiao
Tung U.)
- 6.1.3 NV Memory Using Ge NC in a SiNx Structure (Nat. Chiao Tung Univ.)
- 6.1.4 Thin Film Transistor (TFT) Using Ge Nanocrystals (Nat. Chiao Tung
Univ.)
- 6.1.5 Using Ge-Si Shell Nanocrystal Structures for Improved Data
Retention (U. of Texas)
- 6.1.6 Ge NC in a Tri-Layer Gate Stack Memory (Nat. Univ. of Singapore)
- 6.1.7 Effect of Charging on Current Conduction in Ge NC Memory (Nanyang
Tech. U.)
- 6.1.8 Improved Retention Using Ge/Si Hetero-NC ( U. of Calif.,
Riverside)
- 6.2 Metal Silicide Nanocrystals in Non-volatile Memory
- 6.2.1 Pt Induced PtSi NC Process for Use in Nonvolatile Memory (U. of
Calif., Riverside)
- 6.2.2 CoSi2-Coated Si Nanocrystal Memory Characteristics ( U of Calif.,
Riverside)
- 6.3 Other Metal NanoCrystals in Non-Volatile Memory
- 6.3.1 Charge Storage of <2 nm Pt NC in Al2O3 layers (U. Missouri, N.
Carolina State U.)
- 6.3.2 Floating Gate Memories using Ruthenium Nanocrystals (U. of Texas,
Austin)
- 6.3.3 Electrical Properties of InAs NC in SiO2 Memories (Inst. of
Nanotech Lyon)
- 6.3.4 Floating Gate Memory Using Co NC with SiO2 Shells for Storage (U.
of Texas, Austin)
- 6.3.5 Memory Devices with Single Layer Gold and Platinum NC (Indian
Inst. of Tech.)
- 6.3.6 3D Finite Element Analysis of Metal Nanocrystal Memory (Cornell
U.)
- 6.3.7 Reliability of Mo NC Memory with Ammonia Plasma Treatment (Nat.
Chiao Tung. U)
- 6.3.8 Double Layer Ni Metal and Silicon NC (Jiaotong University)
- 6.3.9 Platinum Nanocrystals in Double Layer Configuration (Applied
Materials, IIT)
- 6.3.10 Memory Using RuO2 Nanocrystals with Wide Memory Window (Chang
Gung Univ.)
- 6.3.11 TiN Nanocrystals Laminated with Al2O3 (Chang Gung Univ.)
- 6.3.12 Reliability and Performance of Devices with Tungten Nanocrystals
(IIT)
- 6.3.13 Characterization of Devices with Au NC (IIT)
7.0 Physical Properties and Fabrication of NC Memories
- 7.1 Method for Forming a Regular Array of SN in a Si3N4 Layer (U. de
Sherbrooke)
- 7.2 Fabrication of Flash Memory using MPTMS Coated CVD deposited Cu
NC(KookminU)
- 7.3 Methods of Fabrication of NC Memories: LP-CVD vs. Ion Implant (Peking
U.)
8.0 Reliability of Nanocrystal Memories
- 8.1 Reliability of Mo NC Memory with Ammonia Plasma Treatment (Nat. Chiao
Tung. U)
- 8.2 Charge Loss Under Heavy Ion Radiation of NC Cell (Univ. of Padova)
- 8.3 Heavy Ion Irradiation of NC Memory Array (Univ. of Padova)
- 8.4 Reliability of Crystalline & Amorphous Nanoparticles in MOS (U. Auto.
de Baja)
- 8.5 Reliability Study of Nanocrystal Memories with High-k Dielectrics
(Texas A&M Univ.)
- 8.6 Analysis of NC Memory Cells in Linear and Subthreshold Regions ( U. of
Padova)
- 8.7 Radiation Studies of Nanocrystal NV Memory
- 8.8 Data Retention Study for Split Gate Nanocrystal Flash Memory
(Freescale)
- 8.9 Irradiation Studies of Nanocrystal Capacitors and Transistors (Nat.
Tech. U. Athens)
- 8.10 Threshold Voltage Instability in NV NC Memories During Retention (U.
of Padova)
9.0 Test and Characterization of Nanocrystal Memory
- 9.1 Dynamic Electrical Behavior of Si-NC Memory Gate Stacks (Inst. of
Microelec. NCSR)
- 9.2 Carrier Transport by FE Thermal Detrapping in SiNC thin film (Tokyo
Inst. of Tech)
- 9.3 Programming Characteristics of Triple Layer Silicon NC Memory (Tsinghua
U.)
- 9.4 Threshold Voltage Variation in NC NV Memories (STMicro. & U. of Padova)
10.0 Using Nanocrystals to Improve SONOS/MONOS Memory Characteristics
- 10.1 TiN NC 3-D Embedded in Al2O3 by Single Co-Sputtering Process (Nat.
Tsing Hua U)
- 10.2 TiN NC 3-D Embedded in Si3N4 by Spinodal Phase Segragation (Nat.
Tsing Hua U.)
- 10.3 Embedding Self-Assembled Si-NC in Storage Nitride (Feng Chia)
- 10.4 SONOS Memory with Silicon NC Layer between Double Tunnel Oxides
(Toshiba)
11. Multiple Layer and Multi-Gate Nanocrystal Memories
- 11.1 Memory Using Multilayered SiC Nanocrystals for Charge Storage (Hanyang)
- 11.2 Double Layer Stacked Heterometal NC of Ni/Au (KAIST)
- 11.3 Double Layer Metal NC Flash EEPROM for MLC Technology (IIT, Mumbai)
- 11.4 Single and Double Layer NC Memories in < 30 nm Node (IIT, Mumbai)
- 11.5 Double Gate and Tri-Gate FinFET Si-NC 10 nm Memories (CEA-LETI)
- 11.6 Tri-Gate FinFlash SN Memory (CEA/LETI)
- 11.7 Si NC Between Double Tunnel Oxide (Toshiba)
12 Vertical Structures for Nanocrystal Memories
- 12.1 Assembly of Stacked Colloidal Nanoparticles in AlO Templates (Myongju
U.)
- 12.2 Gate-All-Around Si Nanowire SONOS Using Si NC/Ni for storage(A-Star,
Singapore)
- 12.3 Gate-All-Around Vertical NC Flash Cell (U. of Texas, Austin)
- 12.4 Improving the P/E Window using a NC FinFET (Sungkyunkwan U.)
- 12.5 Vertical Flash Memory with SiGe Nanocrystals Grown on a Pillar (U. of
Texas)
13.0 Modeling of the Nanocrystal Device and Process
- 13.1 Programming Windows in NC Memory (U. di Padova & U. Auto de
Barcelona).
- 13.2 Model of Memory Window for Metal NC Flash (Cornell, Nat. Chiao Tung,
U.of Iowa)
- 13.3 Model to Calculate Tunnel Current in NC Cells(Air Force Res. Lab.&
U.of Missouri)
- 13.4 Model for Electrical Behavior of NC Trigate Fin-FET Structures (CEA-LETI-Minatec)
- 13.5 Model for NC FinFlash Memories Under Uniform Stress (CEA/LETI)
- 13.6 Charge Retention Model for Metal NC Retention Characteristics (Chin.
Acad. of Sci.)
- 13.7 3-D Simulator for Metal Nanocrystal Flash Memory Design (IIT)
- 13.8 Models for Transient Simulation of NC Flash Cells using Cadence (Nanyang
Tech. U.)
- 13.9 Simulation for Design Optimization in a Metal NC Memory (Cornell U. )
14.0 Basic Research into Nanocrystal Memories
- 14.1 Charge Characteristics of Colloidal NC Embedded in TiO2 Film (Chungnam
Nat. U.)
- 14.2 Magnetic Nanodot Memories (North Carolina State University)
- 14.3 Iron Nanoparticle Memory in Hollow Carbon Nanotube
- 14.4 DNA Method to Create Lattices of Two Type Nanoparticles (Brookhaven
Nat. Lab)
- 14.5 Model for Single Electron Tunneling in Nanocrystal Memories (Catania)
- 14.6 Electrostatics of Metal Nanocrystal - Carbon Nanotube Memories
(Cornell U.)
15.0 Developers and Vendors of Nanocrystal Memories
- 15.1 Atmel
- 15.2 Freescale
- 15.3 Micron Technology
- 15.4 Numonyx (and STMicroelectronics)
- 15.6 Toshiba
Bibliography

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