Resistance RAMs - Phase Change Memory (PCM, PC-RAM, PRAM, OUM), Solid Electrolyte Memories (CB-RAM, PMC-RAM, Nanobridge RAM) Metal Oxide Resistance RAMs (RRAM, ReRAM)

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A Memory Strategies Focus Report

Trends in Resistance RAMs , June 2009

(Phase Change Memory, Conductive Bridge RAMs, Metal Oxide RAMs)

This report discusses progress being made in Resistance RAMs. These devices include Phase Change Memories (PCM, PC-RAM, PRAM, OUM), Solid Electrolyte Memories (CB-RAM, PMC-RAM, Nanobridge RAM) and various Metal Oxide Resistance RAMs (RRAM, ReRAM). All of these memories change resistance upon switching in a repeatable manner.

A wide range of applications have been suggested for the various Resistance RAMs. Companies developing Phase Change Memories have discussed using them as NOR Flash Memory Replacement. Metal oxide memories have been considered for use as cross-point arrays for very high density applications in data storage and also for NAND Flash replacement. The solid electrolyte switch memories have been shown for embedding in CMOS LSI logic and for use in FPGA circuits. Polymer resistive memories are being discussed for RFID applications on flexible substrates.

Announcements of sampling of the Phase Change Memories have been made, but volume production does not seem to have yet occurred. Development is currently being done in multilevel and stacked PCM technology and a significant amount of effort is happening in characterization and modeling of the complex phase change switching process. Efforts to reduce the programming current to the amorphous state continue, as do efforts to understand and model spontaneous crystallization in the amorphous state and resistance drift in the amorphous state.

A number of metal oxide switching materials are being considered for Resistance RAMs and active characterization and modeling efforts are ongoing. For very high density arrays targeted at the NAND Flash replacement market there is effort to improve the density and reliability of multiple stacks of cross-point arrays of RRAMs with diode switches. Horizontal as well as vertical stacks have been discussed.

Work is also ongoing on the solid electrolyte switching memories which include the Conductive Bridge RAM, the Programmable Metallization RAM and the Nanobridge RAM with several embedded logic technologies being proposed. R&D is also taking place in organic resistive switching memories.

130+ pages.

We also have focus reports available on Ferroelectric memory & Magnetic memory

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Table of Contents - Trends in Resistance RAMs, June 2009

1.0 Overview of Resistive RAMs and Their Applications

2.0 Applications for RRAMs Including Phase Change Memories and Conductive Bridge RAMs

2.1 Overview of Applications Targeted for Resistance RAMs
2.2 PC-RAM as NOR Flash Memory Replacement
2.3 ReRAM as NAND Flash Memory Replacement
2.4 CMOS Compatible Solid Electrolyte Switch for Use in Programmable LSI
2.5 RFID Applications for Polymer Resistive Memory
2.6 Solid Electrolyte Switch for use in FPGA Applications
2.7 Metal Oxide 1T1R Memories for Program Execution and Data Storage in Computer
2.8 Serial Interface 4-Mb SPI NV Memory
2.9 Air, Military and Space Applications
2.10 Automotive and Industrial Extended Temperature Applications

3.0 Cell Sizes vs. Technology for Various Resistive RAMs

4.0 Chalcogenide Phase Change RAMs

4.1 Background of Phase-Change RAM (PC-RAM) Technology
4.2 Overview of Issues for Phase Change Memory in the Amorphous State
- 4.2.1 Resistance Variations in the RESET State for Phase Change Memory
4.3 Resistance Drift Due to Structural Relaxation
- 4.3.1 Overview of Resistance Drift Due to Structural Relaxation
- 4.3.2 Characterization of Structural Relaxation in Amorphous PCMs (Politech. di Milano)
- 4.3.3 A Study of Structural Relaxation in PCM Cells (Politecnico de Milano)
- 4.3.4 Structural Relaxation Model to Explain PCM Drift (Intel)
- 4.3.5 Temperature Acceleration of Relaxation of Amorphous PCM Cell(Polit. di Milano)
- 4.3.6 Reducing Resistance Fluctuations using a CMP Process (Chinese Acad. of Sci.)
- 4.3.7 Embedded 8-bit RISC To Control RESET Resistance Variation (Samsung,KAIST)
- 4.3.8 Resistance Drift in the RESET State Due to Structural Relaxation (Politech. di Milano)
4.4 Data Loss from the Amorphous (RESET) State of the Phase Change Memory
- 4.4.1 Mechanisms of Data Retention Loss from the RESET State (IBM, Macronix)
- 4.4.2 TEM Observations of Slow Quenching Crystallization Behavior
- 4.4.3 RESET Tail Due to Quenching Dispersion and Defects (STMicro, Politec di Milano)
- 4.4.4 Data Retention Degradation Control Using Heat Dissipation(Samsung)
- 4.4.5 Model for Data Retention In Amorphous PC-RAM ((Politechnico de Milano)
- 4.4.6 Data Retention of Amorphous State Due to Nucleation and Percolation(Intel&STM)
4.5. Oscillatory Behavior of a PCM in the Amorphous State
4.6 Physical Shift in Amorphous Material Due to Thomson Effect(NXP,TSMC,IMEC)
4.7 Reducing Write Current in Phase Change Memory
- 4.7.1 Confined PCM for Low Write Current Sub-20nm Technology Generation (Samsung)
- 4.7.2 Reducing Write Current Using a Cross-Spacer (ITRI, PCS, ProMOS, Nanya, Winbond)
- 4.7.3 Simulation of Interface Thermal Resistance Increases in PCM (Stanford U.&Intel)
- 4.7.4 Effect of Interface Resistance on Power in a PC-RAM Cell (Intel, Ovonyx, Stanford)
- 4.7.5 Double Confinement Layer to Prevent Heat Loss and Lower RESET Current (ITRI)
- 4.7.6 Reducing Current With Non-Lithographically Defined Pore (IBM, Qimonda, Macronix)
- 4.7.7 Confined Chalcogenide Element to Reduce Write Current
4.8 Dynamic Resistance of the PCM Cell
- 4.8.1 Measurements of Dynamic Resistance of the PCM Cell (IBM, Macronix)
- 4.8.2 Dynamic Resistance - A New Characterization Metric for PCM (IBM, Macronix)
- 4.8.3 Analytical Model for RESET Operation of PCM (IBM, Macronix)
4.9 Characterization of the SET Operation in PC Memories
- 4.9.1 Characterization of PCM Shunt Percolation Path (U.di Ferrara)
- 4.9.2 Characterization of 256-Kb GST PCM arrays in 180 nm CMOS (Qimonda)
- 4.9.3 Characterization of the SET Operation in a PCM (Univ. di Roma)
- 4.9.4 Analysis of Temperature Scaling Issues for PC-RAM (Stanford Univ.)
4.10 Phase Change Memory Cross-Point Cells with Scaled Diode Switches
- 4.10.1 Cross-Point PCM Using Polysilicon Selection Diode (Hitachi)
- 4.10.2 Circuit and Design of Scaled Diode Switch PCM (Rensselaer Polytechnical Institute)
- 4.10.3 Comparison of Current Drive of PN Diodes vs. MOSFETs with PCM (Hong Kong U.)
- 4.10.4 Phase Change Memory Cross-Point Cell with Doped Ge Nanowire Diodes (Stanford)
- 4.10.5 Cross-bar Switch Memory (Hewlett-Packard)
- 4.10.6 Physical model for PCM with Diode Access Device (HKUST)
4.11 Novel Phase Change Materials for Phase Change Memory Cells
- 4.11.1 PC-RAM using GeTe and In₂Se₃ Nanowires
- 4.11.2 PCM Made from InGaO (Nat. Taiwan Univ.)
- 4.11.3 Investigation of PCM based on Ga₂Sb₈Te₁. (Shanghai Jiaotong Univ)
- 4.11.4 PCM Using Doped In-Ge-Te for High Temperature Stability (Hitachi, Renesas)
- 4.11.5 Si-Sb-Te As a Phase Change Material (Fudan Univ.)
- 4.11.6 Using GeSnSbTe (GSST) for PC-RAM - ITRI (Taiwan)
4.12 Multi-Level Phase Change Memory Operation
- 4.12.1 Parallel Multi-Confined PCM Cell for Multi-Level Operation
- 4.12.2 90 nm 128-Mb PCM with BJT and Multilevel Storage (Numonyx, STM, U. of Pavia)
- 4.12.3 Multi-Level Lateral PCM Using a Top Heater (Gunma Univ.)
- 4.12.4 Two Bit, Four Level PCM Cell Operation (Samsung)
- 4.12.5 256Mb Multilevel Cell PCM Technology and Operation (STMicroelectronics)
- 4.12.6 Multi-Level PCM Technology and Program (IBM, Qimonda, Macronix)
- 4.12.7 Multi-Bit Cell Using Cross-Spacer ((ITRI, PCS, ProMOS, Nanya, Winbond)
4.13 Modeling of Phase Change Memory
- 4.13.1 PCM Model Characterizing Effects of Threshold Switching (Politecnico di Milano)
- 4.13.2 Model of Low Frequency Current Noise in PCM Devices (Numonyx)
- 4.13.3 3-D Finite Element Model of Thermal Effects in PCM Cell Design(Chi.Acad.of Sci.)
- 4.13.4 PCM Model in Verilog-A (Hong Kong Univ. of Sc. and Tech.)
- 4.13.5 Modeling the Threshold Switching Curve in a PCM (Peking Univ.)
- 4.13.6 TCAD Model for PCM (Synopsys)
- 4.13.7 Process-Aware Compact Model of PC-RAM (Samsung)
- 4.13.8 Finite Element Simulator Model of PCM Cell (U. of Pavia)
- 4.13.9 Modeling Max. Temperature of a GST PCM (Nat. Chiao Tung Univ.)
- 4.13.10 Model for PCM Using Crystallization& Amorphization Rate Equations (Renesas)
- 4.13.11 HSPICE Model for PCM Thermal and Electrical Conductivities (Nat. Ilan Univ.)
- 4.13.12 Thermal Model of GST Based PCM (Stanford Univ.)
- 4.13.13 Model for Amorphous Drift Coefficient of PCM (ST Microelectronics)
- 4.13.14 Modeling a Confined Cell PCM (Stanford University)
- 4.13.15 Model of Programming and Data Retention in PC-RAMs (STMicro,Polit.di Milano)
- 4.13.16 Model of Multilevel Cell PC-RAM (STMicroelectronics)
- 4.13.17 2D Model for Thermal Behavior of a PCM Cell (Rochester Inst. of Tech.)
- 4.13.18 Negative Differential Resistance Modeling of SET Transition of PC-RAM
- 4.13.19 Modeling of the Chalcogenide Phases and The PCM Cell (Politecnico de Milano)
4.14 Reliability and Test of Phase Change Memory
- 4.14.1 SET Stuck Failure in GST Phase Change Memory
- 4.14.2 Low Power Test of PCM Devices (Cheng Kung University)
- 4.14.3 Effect of Ion Radiation on PCM with MOSFET and BJT Selectors (U. di Padova)
- 4.14.4 Effect of Cell Geometry on the RESET Process (U. of Pavia)
- 4.14.5 Temperature Dependence of PCM Programmed Resistance States (U. of Pavia)
- 4.14.6 Ionizing 8-MeV Radiation Dose Effects on a 4-Mb PCM (U. of Padova)
- 4.14.7 Reliability and Radiation Testing of a PCM Test Chip (Boise State U.)
- 4.14.8 Investigation of Long Cycled PCM Including a Refresh Method (KAIST)
- 4.14.9 Determination of GST Crystallization Activation Energy(STMicro, Polit.di Milano)
- 4.14.10 Primary Reliability Issues for Phase Change Memories (Politechnico di Milano)
- 4.14.11 Temperature Dependence of Retention Lifetime Curve (Politechnico di Milano)
- 4.14.12 Yield Enhancement Using A BISO for Embedded Memory (Samsung, KAIST)
4.15 Circuits for Phase Change Memories
- 4.15.1 Program Circuit for a 90 nm 4-Mb Embedded PCM (STMicroelectronics)
- 4.15.2 Four Terminal Phase Change Programmable Switch (ETRI)
4.16 Processes for Scaling the PC-RAM Cell
- 4.16.1 Ultimate Size Limits for PCM (TRIZ Experts)
- 4.16.2 Etching Characteristics of Nitrogen Doped GST(IBM)
- 4.16.3 Characteristics for Scaling the PCM (NXP-TSMC)
- 4.16.4 Etching a sub-100 nm PCM Cell using UV NanoImprint Litho(Nano-Tech Lab)
- 4.16.5 E-Beam Litho and Optical Litho to Make a 45 nm PC-RAM Cell (DSTAR)

5.0 Metal Oxide Memories

5.1 Overview of Metal Oxide Memories
5.2 Technical Issues and Mechanisms of Copper (Cu) Metal Oxide Memories
- 5.2.1 CuO ReRAM Cells (Fudan University)
5.3 Technical Issues and Mechanisms of Tungsten (W) Metal Oxide Memories
- 5.3.1 Unipolar WOx Memory (Nat. Chiao Tung U.)
- 5.3.2 Self Aligned WOx Cell (Macronix)
5.4 Technical Issues and Mechanisms of Iron (FE) Metal Oxide Memories
- 5.4.1 RRAM using Fe-O for Fast Redox Reaction Switching (Matsushita)
5.5 Technical Issues and Mechanisms of Zirconium (Zr) Metal Oxide Memories.
- 5.5.1 Resistance Variations During Switching of a SrZrO3 RRAM (Nat. Chiao Tung U.)
- 5.5.2 Resistive Switching of Cu doped ZrO2 (Chinese Academy of Science)
- 5.5.3 SrZrO3:Cr Metal-Oxide-Metal Structures (Korea Inst. of Sci. and Tech.)
- 5.5.4 Electrode Material Effect on ZrO2 Switching(U. C. Berk., TSMC, Nat. Ch. Tung U.)
5.6 Technical Issues and Mechanisms of Niobium (Ni) Metal Oxide Memories
- 5.6.1 Vertical Cross-Point NiO Transition Metal Oxide RRAM (Samsung)
- 5.6.2 Improved Confinement of Conduction path for 3D NiO ReRAM Cell
- 5.6.3 Characterization of NiO RRAM in Low Resistance State (Politechnico di Milano)
- 5.6.4 Model for Physical Switching Mechanism in NiO Memory (Politechnico di Milano)
- 5.6.5 Stacked 3-D NiO RRAM with CuO diode and GIZO peripheral TFT (Samsung)
- 5.6.6 Integration of NiO Memory in Interconnect Structures (U. of Sud Toulon)
- 5.6.7 ReRAM Made with NiO Doped with Ti:NiO (Fujitsu)
- 5.6.8 Stacked Cross-Point Diode Ti Doped NiO RRAM Array (Samsung)
5.7 Technical Issues and Mechanisms of Titanium (Ti) Metal Oxide Memories
- 5.7.1 Studies of TiO2 cross-bar array RRAMs (Forschungszentrum Julich)
- 5.7.2 Resistive Switching of TiO Crossbar and Via Hole Devices (KAIST & ETRI)
5.8 Technical Issues and Mechanisms of HfO2 Metal Oxide Memories
- 5.8.1 1Kb HfO2 RRAM in 180 nm CMOS (ITRI, MingShin U., Tsing Hua U.)
- 5.8.2 Improving the Uniformity of Oxide Based RRAM (Peking Univ., Albany Univ.)
5.9 Copper Doped MoOx / GdOx Bilayer Films (Gwangju Inst. of Sci. & Tech.)
5.10 Modeling, Reliability and Characterization of Metal oxide Memory Cells
- 5.10.1 Numerical Modeling of RESET Programming in a NiO RRAM (Politech. di Milano)
- 5.10.2 Oxygen Ion Transport Model for Metal Oxide RRAMs(Peking U., State U. of N.Y.)
- 5.10.3 Characterization and Modeling of Metal Oxide RRAMS (Peking University)
- 5.10.4 Characterization of Switching Mechanisms in Metal Oxides(Gwangju Inst.)
- 5.10.5 Modeling a Percolation Process for a TiO2 and HfO2 RRAM (Peking Univ.)
- 5.10.6 Physical Model of ZnO Cell (Peking University)
- 5.10.7 Reliability of CuxO RRAM Made by Growing CuO in Plasma Oxidation (Fudan U.)
- 5.10.8 Data Retention Study of CuO MIM Memory Cell (Spansion)
- 5.10.9 Model of Conduct. Filament Switching in NiO RRAM (Pol.diMilano&CNR-INFM)

6.0 Metal Oxide Memories on Flexible Substates

7.0 Programmable Logic Using RRAM

7.1 Using RRAM to Build 3-D FPGA (Chinese Academy of Science)
7.2 Tantalum (Ta₂O₅) Metal Oxide RAM (Nanobridge) for Use in FPGA (NEC)

8.0 Solid Electrolyte (Conductive Bridge) Resistance RAMs

8.1 Kinetics of Programming ML Cells in PMC Memory (Politechnico di Milano, ASU)
8.2 Solid Electrolyte Switch Embedded in Copper Interconnect (NEC)
8.3 Solid Electrolyte Switch for Using In FPGA (NEC)
8.4 Study of CB-RAM Resistance Ratio vs. Electrode Size (Samsung, Sejong U.)
8.5 Kinetic Study of PMC / CB-RAM (Politechnico di Milano, U. of Arizona)
8.6 Kinetic Study of CB-RAM during Programming (Polit. di Milano and U. of Arizona)
8.7 Conductive Bridge 4-Mb RAM Circuit Technology (Qimonda, Altis)
8.8 Cu Ion Conductive Bridge Solid Electrolyte RRAM (Sony)
8.9 Metal Sulfide Solid Electrolyte ReRAM
- 8.9.1 Overview of Metal Sulfide RRAM
- 8.9.2 Cu₂S Memory Cells Made using Pulsed Laser Deposition (Jiangsu Univ.)

9.0 Organic Resistance Switching Elements

9.1 Polymer Memory Array on Plastic Substrate (ITRI)
9.2 Multiple Layer Cross-Linkable Co-Polymer Film Memory ( U. of Calif. L.A.)

10.0 Other Resistive Switching Materials

10.1 BiStable Resistive Switching Using LSMO (Tsinghua University)
10.2 Resistive Switching Behavior of Si3N4 (Peking University)

11.0 Developers and Vendors of Phase Change and Resistance RAMs

11.1 4DS (RRAM)
11.2 BAE Systems (Phase Change RAM)
11.3 Elpida and UMC
11.4 Fujitsu
11.5 Hewlett-Packard ( HP )
11.6 Hynix
11.7 IBM, Macronix, [Qimonda /Infineon]
11.8 IMEC
11.9 Intel
11.10 ITRI
- 11.10.1 ITRI Resistance RAM
- 11.10.2 ITRI Phase Change Memory
- 11.10.3 ITRI Polymer Memory
11.11 Macronix/IBM
- 11.11.1 Macronix WOx Resistance Memory
- 11.11.2 Macronix-IBM Phase Change Memory
11.12 Matsushita
11.13 Ovonyx
11.14 Qimonda (Qimonda has since gone out of business)
11.15 NEC
11.16 Numonyx (Intel and STMicroelectronics)
11.17 NXP and TSMC
11.18 Renesas (Hitachi)
11.19 Samsung
- 11.19.1 Samsung Phase Change RAM
- 11.19.2 Samsung RRAM
11.20 Spansion
11.21 ST Microelectronics
11.22 Unity Semiconductor
11.23 Winbond

Bibliography

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